Inside Advanced Scale Challenges|Saturday, January 19, 2019
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REFLEX CES Offers Low-profile PCIe Boards for HPC, Finance and Networking Markets 

PARIS, April 6, 2018 -- REFLEX CES, a leading European-based provider of custom embedded systems and High-End FPGA COTS boards, is pushing technological barriers with its two low-profile PCIe boards.

These two low-Profile PCIe Network Processing FPGA Boards are based on an Intel PSG Arria 10 GX 1150 KLE FPGA. They both are specially designed for HPC, Finance and Networking applications, and specialized in Low latency applications with a very cost-effective price point.

Thanks to its expertise in the design and manufacture of complex FPGA network accelerator cards, REFLEX CES was able to use the FPGA technology to develop an off-the-shelf best-in-class hardware solution.

The XpressGXA10-LP1150 features 80G Ethernet, 1 bank of 4GB DDR4, 4 banks of QDR2+ memory, two QSFP+ cages for multi 10GbE/40GbE networking solutions, and 16 transceiver expansion ports.
The board is available in three versions: Basic (DDR4), Ultra (DDR4, 4 banks of 144Mbit QDR2+) and Turbo (DDR4, 4 banks of 72Mbit QDR2+ Xtrem).

The XpressGXA10-LP1151, in its Basic version, features 40G Ethernet, 1 bank of 8G DDR4, a QSFP+ quad optical cage, a Board Management Controller with IPMI commands, USB Blaster on board, and 10 transceiver expansion ports.

Both boards are designed to be in a single width slot using a passive heat sink for standard servers.

These two Low-profile boards from REFLEX CES complement the existing High-Performance Computing and Finance solutions.


Recognized for its expertise in high-speed applications, analog and hardened systems, REFLEX CES has become a leading partner with major industrial companies.
REFLEX CES simplifies the adoption of FPGA technology with its leading-edge FPGA-based custom embedded and complex systems. REFLEX CES FPGA network platforms enable better flexibility and ease of programming, offering a faster and more powerful board, and reducing the customers’ technology risks and time to market.


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